Latest compatible version of Classicube from the original GitHub repository (https://github.com/ClassiCube/ClassiCube) that can be compiled on Classicube for PowerMac PPC running Mac OS X 10.4.
This commit is contained in:
Andrei Alexandru
802
misc/32x/sh2_crt0.s
Normal file
802
misc/32x/sh2_crt0.s
Normal file
@@ -0,0 +1,802 @@
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! SEGA 32X support code for SH2
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! by Chilly Willy
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! Rom header and SH2 init/exception code - must be first in object list
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.text
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! Standard MD Header at 0x000
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.incbin "build/32x/m68k_crt0.bin", 0, 0x3C0
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! Standard Mars Header at 0x3C0
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.ascii "ClassiCube 32X " /* module name (16 chars) */
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.long 0x00000000 /* version */
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.long __text_end-0x02000000 /* Source (in ROM) */
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.long 0x00000000 /* Destination (in SDRAM) */
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.long __data_size /* Size */
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.long 0x06000240 /* Master SH2 Jump */
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.long 0x06000244 /* Slave SH2 Jump */
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.long 0x06000000 /* Master SH2 VBR */
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.long 0x06000120 /* Slave SH2 VBR */
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! Standard MD startup code at 0x3F0
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.incbin "build/32x/m68k_crt1.bin"
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.data
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! Master Vector Base Table at 0x06000000
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.long mstart /* Cold Start PC */
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.long 0x0603FC00 /* Cold Start SP */
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.long mstart /* Manual Reset PC */
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.long 0x0603FC00 /* Manual Reset SP */
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.long main_err /* Illegal instruction */
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.long 0x00000000 /* reserved */
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.long main_err /* Invalid slot instruction */
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.long 0x20100400 /* reserved */
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.long 0x20100420 /* reserved */
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.long main_err /* CPU address error */
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.long main_err /* DMA address error */
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.long main_err /* NMI vector */
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.long main_err /* User break vector */
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.space 76 /* reserved */
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.long main_err /* TRAPA #32 */
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.long main_err /* TRAPA #33 */
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.long main_err /* TRAPA #34 */
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.long main_err /* TRAPA #35 */
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.long main_err /* TRAPA #36 */
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.long main_err /* TRAPA #37 */
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.long main_err /* TRAPA #38 */
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.long main_err /* TRAPA #39 */
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.long main_err /* TRAPA #40 */
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.long main_err /* TRAPA #41 */
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.long main_err /* TRAPA #42 */
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.long main_err /* TRAPA #43 */
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.long main_err /* TRAPA #44 */
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.long main_err /* TRAPA #45 */
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.long main_err /* TRAPA #46 */
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.long main_err /* TRAPA #47 */
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.long main_err /* TRAPA #48 */
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.long main_err /* TRAPA #49 */
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.long main_err /* TRAPA #50 */
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.long main_err /* TRAPA #51 */
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.long main_err /* TRAPA #52 */
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.long main_err /* TRAPA #53 */
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.long main_err /* TRAPA #54 */
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.long main_err /* TRAPA #55 */
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.long main_err /* TRAPA #56 */
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.long main_err /* TRAPA #57 */
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.long main_err /* TRAPA #58 */
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.long main_err /* TRAPA #59 */
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.long main_err /* TRAPA #60 */
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.long main_err /* TRAPA #61 */
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.long main_err /* TRAPA #62 */
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.long main_err /* TRAPA #63 */
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.long main_irq /* Level 1 IRQ */
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.long main_irq /* Level 2 & 3 IRQ's */
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.long main_irq /* Level 4 & 5 IRQ's */
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.long main_irq /* PWM interupt */
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.long main_irq /* Command interupt */
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.long main_irq /* H Blank interupt */
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.long main_irq /* V Blank interupt */
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.long main_irq /* Reset Button */
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! Slave Vector Base Table at 0x06000120
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.long sstart /* Cold Start PC */
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.long 0x06040000 /* Cold Start SP */
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.long sstart /* Manual Reset PC */
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.long 0x06040000 /* Manual Reset SP */
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.long slav_err /* Illegal instruction */
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.long 0x00000000 /* reserved */
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.long slav_err /* Invalid slot instruction */
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.long 0x20100400 /* reserved */
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.long 0x20100420 /* reserved */
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.long slav_err /* CPU address error */
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.long slav_err /* DMA address error */
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.long slav_err /* NMI vector */
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.long slav_err /* User break vector */
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.space 76 /* reserved */
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.long slav_err /* TRAPA #32 */
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.long slav_err /* TRAPA #33 */
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.long slav_err /* TRAPA #34 */
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.long slav_err /* TRAPA #35 */
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.long slav_err /* TRAPA #36 */
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.long slav_err /* TRAPA #37 */
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.long slav_err /* TRAPA #38 */
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.long slav_err /* TRAPA #39 */
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.long slav_err /* TRAPA #40 */
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.long slav_err /* TRAPA #41 */
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.long slav_err /* TRAPA #42 */
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.long slav_err /* TRAPA #43 */
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.long slav_err /* TRAPA #44 */
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.long slav_err /* TRAPA #45 */
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.long slav_err /* TRAPA #46 */
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.long slav_err /* TRAPA #47 */
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.long slav_err /* TRAPA #48 */
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.long slav_err /* TRAPA #49 */
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.long slav_err /* TRAPA #50 */
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.long slav_err /* TRAPA #51 */
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.long slav_err /* TRAPA #52 */
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.long slav_err /* TRAPA #53 */
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.long slav_err /* TRAPA #54 */
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.long slav_err /* TRAPA #55 */
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.long slav_err /* TRAPA #56 */
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.long slav_err /* TRAPA #57 */
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.long slav_err /* TRAPA #58 */
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.long slav_err /* TRAPA #59 */
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.long slav_err /* TRAPA #60 */
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.long slav_err /* TRAPA #61 */
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.long slav_err /* TRAPA #62 */
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.long slav_err /* TRAPA #63 */
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.long slav_irq /* Level 1 IRQ */
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.long slav_irq /* Level 2 & 3 IRQ's */
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.long slav_irq /* Level 4 & 5 IRQ's */
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.long slav_irq /* PWM interupt */
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.long slav_irq /* Command interupt */
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.long slav_irq /* H Blank interupt */
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.long slav_irq /* V Blank interupt */
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.long slav_irq /* Reset Button */
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! The main SH2 starts here at 0x06000240
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mstart:
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bra mcont
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nop
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! The slave SH2 starts here at 0x06000244
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sstart:
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bra scont
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nop
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! Each section of code below has its own data table so that the code
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! can be extended without worrying about the offsets becoming too big.
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! This results in duplicate entries, but not so many that we care. :)
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mcont:
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! clear interrupt flags
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mov.l _master_int_clr,r1
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mov.w r0,@-r1 /* PWM INT clear */
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mov.w r0,@r1
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mov.w r0,@-r1 /* CMD INT clear */
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mov.w r0,@r1
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mov.w r0,@-r1 /* H INT clear */
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mov.w r0,@r1
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mov.w r0,@-r1 /* V INT clear */
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mov.w r0,@r1
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mov.w r0,@-r1 /* VRES INT clear */
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mov.w r0,@r1
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mov.l _master_stk,r15
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! purge cache and turn it off
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mov.l _master_cctl,r0
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mov #0x10,r1
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mov.b r1,@r0
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! clear bss
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mov #0,r0
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mov.l _master_bss_start,r1
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mov.l _master_bss_end,r2
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0:
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mov.l r0,@r1
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cmp/eq r1,r2
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bf/s 0b
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add #4,r1
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! wait for 68000 to finish init
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mov.l _master_sts,r0
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mov.l _master_ok,r1
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1:
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mov.l @r0,r2
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nop
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nop
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cmp/eq r1,r2
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bt 1b
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! do all initializers
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mov.l _master_do_init,r0
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jsr @r0
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nop
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! let Slave SH2 run
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mov #0,r1
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mov.l r1,@(4,r0) /* clear slave status */
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mov #0x80,r0
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mov.l _master_adapter,r1
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mov.b r0,@r1 /* set FM */
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mov #0x00,r0
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mov.b r0,@(1,r1) /* set int enables */
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mov #0x20,r0
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ldc r0,sr /* allow ints */
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! purge cache, turn it on, and run main()
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mov.l _master_cctl,r0
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mov #0x11,r1
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mov.b r1,@r0
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mov.l _master_go,r0
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jsr @r0
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nop
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! do all finishers
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mov.l _master_do_fini,r0
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jsr @r0
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nop
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2:
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bra 2b
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nop
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.align 2
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_master_int_clr:
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.long 0x2000401E /* one word passed last int clr reg */
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_master_stk:
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.long 0x0603FC00 /* Cold Start SP */
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_master_sts:
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.long 0x20004020
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_master_ok:
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.ascii "M_OK"
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_master_adapter:
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.long 0x20004000
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_master_cctl:
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.long 0xFFFFFE92
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_master_go:
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.long _main
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_master_bss_start:
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.long __bss_start
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_master_bss_end:
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.long __bss_end
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_master_do_init:
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.long __INIT_SECTION__
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_master_do_fini:
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.long __FINI_SECTION__
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scont:
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! clear interrupt flags
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mov.l _slave_int_clr,r1
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mov.w r0,@-r1 /* PWM INT clear */
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mov.w r0,@r1
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mov.w r0,@-r1 /* CMD INT clear */
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mov.w r0,@r1
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mov.w r0,@-r1 /* H INT clear */
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mov.w r0,@r1
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mov.w r0,@-r1 /* V INT clear */
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mov.w r0,@r1
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mov.w r0,@-r1 /* VRES INT clear */
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mov.w r0,@r1
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mov.l _slave_stk,r15
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! wait for Master SH2 and 68000 to finish init
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mov.l _slave_sts,r0
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mov.l _slave_ok,r1
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1:
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mov.l @r0,r2
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nop
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nop
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cmp/eq r1,r2
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bt 1b
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mov.l _slave_adapter,r1
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mov #0x00,r0
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mov.b r0,@(1,r1) /* set int enables (different from master despite same address!) */
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mov #0x20,r0
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ldc r0,sr /* allow ints */
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! purge cache, turn it on, and run slave()
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mov.l _slave_cctl,r0
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mov #0x11,r1
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mov.b r1,@r0
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mov.l _slave_go,r0
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jmp @r0
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nop
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.align 2
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_slave_int_clr:
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.long 0x2000401E /* one word passed last int clr reg */
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_slave_stk:
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.long 0x06040000 /* Cold Start SP */
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_slave_sts:
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.long 0x20004024
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_slave_ok:
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.ascii "S_OK"
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_slave_adapter:
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.long 0x20004000
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_slave_cctl:
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.long 0xFFFFFE92
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_slave_go:
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.long _slave
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! Master exception handler
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main_err:
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rte
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nop
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! Master IRQ handler
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main_irq:
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mov.l r0,@-r15
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stc sr,r0 /* SR holds IRQ level in I3-I0 */
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shlr2 r0
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and #0x38,r0
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cmp/eq #0x28,r0
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bt main_h_irq
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cmp/eq #0x18,r0
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bt main_pwm_irq
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cmp/eq #0x30,r0
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bt main_v_irq
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cmp/eq #0x20,r0
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bt main_cmd_irq
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cmp/eq #0x38,r0
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bt main_vres_irq
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mov.l @r15+,r0
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rte
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nop
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main_v_irq:
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mov.l r1,@-r15
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mov.l mvi_mars_adapter,r1
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mov.w r0,@(0x16,r1) /* clear V IRQ */
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nop
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nop
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nop
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nop
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! handle V IRQ
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mov.l @r15+,r1
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mov.l @r15+,r0
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rte
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nop
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.align 2
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mvi_mars_adapter:
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.long 0x20004000
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main_h_irq:
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mov.l r1,@-r15
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mov.l mhi_mars_adapter,r1
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mov.w r0,@(0x18,r1) /* clear H IRQ */
|
||||
nop
|
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nop
|
||||
nop
|
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nop
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|
||||
! handle H IRQ
|
||||
|
||||
mov.l @r15+,r1
|
||||
mov.l @r15+,r0
|
||||
rte
|
||||
nop
|
||||
|
||||
.align 2
|
||||
mhi_mars_adapter:
|
||||
.long 0x20004000
|
||||
|
||||
main_cmd_irq:
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||||
mov.l r1,@-r15
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||||
|
||||
mov.l mci_mars_adapter,r1
|
||||
mov.w r0,@(0x1A,r1) /* clear CMD IRQ */
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
|
||||
! handle CMD IRQ
|
||||
|
||||
mov.l @r15+,r1
|
||||
mov.l @r15+,r0
|
||||
rte
|
||||
nop
|
||||
|
||||
.align 2
|
||||
mci_mars_adapter:
|
||||
.long 0x20004000
|
||||
|
||||
main_pwm_irq:
|
||||
mov.l r1,@-r15
|
||||
|
||||
mov.l mpi_mars_adapter,r1
|
||||
mov.w r0,@(0x1C,r1) /* clear PWM IRQ */
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
|
||||
! handle PWM IRQ
|
||||
|
||||
mov.l @r15+,r1
|
||||
mov.l @r15+,r0
|
||||
rte
|
||||
nop
|
||||
|
||||
.align 2
|
||||
mpi_mars_adapter:
|
||||
.long 0x20004000
|
||||
|
||||
main_vres_irq:
|
||||
mov.l mvri_mars_adapter,r1
|
||||
mov.w r0,@(0x14,r1) /* clear VRES IRQ */
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
|
||||
mov #0x0F,r0
|
||||
shll2 r0
|
||||
shll2 r0
|
||||
ldc r0,sr /* disallow ints */
|
||||
|
||||
mov.l mvri_master_stk,r15
|
||||
mov.l mvri_master_vres,r0
|
||||
jmp @r0
|
||||
nop
|
||||
|
||||
.align 2
|
||||
mvri_mars_adapter:
|
||||
.long 0x20004000
|
||||
mvri_master_stk:
|
||||
.long 0x0603FC00 /* Cold Start SP */
|
||||
mvri_master_vres:
|
||||
.long main_reset
|
||||
|
||||
! Slave exception handler
|
||||
|
||||
slav_err:
|
||||
rte
|
||||
nop
|
||||
|
||||
! Slave IRQ handler
|
||||
|
||||
slav_irq:
|
||||
mov.l r0,@-r15
|
||||
|
||||
stc sr,r0 /* SR holds IRQ level I3-I0 */
|
||||
shlr2 r0
|
||||
and #0x38,r0
|
||||
cmp/eq #0x28,r0
|
||||
bt slav_h_irq
|
||||
cmp/eq #0x18,r0
|
||||
bt slav_pwm_irq
|
||||
cmp/eq #0x30,r0
|
||||
bt slav_v_irq
|
||||
cmp/eq #0x20,r0
|
||||
bt slav_cmd_irq
|
||||
cmp/eq #0x38,r0
|
||||
bt slav_vres_irq
|
||||
|
||||
mov.l @r15+,r0
|
||||
rte
|
||||
nop
|
||||
|
||||
slav_v_irq:
|
||||
mov.l r1,@-r15
|
||||
|
||||
mov.l svi_mars_adapter,r1
|
||||
mov.w r0,@(0x16,r1) /* clear V IRQ */
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
|
||||
! handle V IRQ
|
||||
|
||||
mov.l @r15+,r1
|
||||
mov.l @r15+,r0
|
||||
rte
|
||||
nop
|
||||
|
||||
.align 2
|
||||
svi_mars_adapter:
|
||||
.long 0x20004000
|
||||
|
||||
slav_h_irq:
|
||||
mov.l r1,@-r15
|
||||
|
||||
mov.l shi_mars_adapter,r1
|
||||
mov.w r0,@(0x18,r1) /* clear H IRQ */
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
|
||||
! handle H IRQ
|
||||
|
||||
mov.l @r15+,r1
|
||||
mov.l @r15+,r0
|
||||
rte
|
||||
nop
|
||||
|
||||
.align 2
|
||||
shi_mars_adapter:
|
||||
.long 0x20004000
|
||||
|
||||
slav_cmd_irq:
|
||||
mov.l r1,@-r15
|
||||
|
||||
mov.l sci_mars_adapter,r1
|
||||
mov.w r0,@(0x1A,r1) /* clear CMD IRQ */
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
|
||||
! handle CMD IRQ
|
||||
|
||||
mov.l @r15+,r1
|
||||
mov.l @r15+,r0
|
||||
rte
|
||||
nop
|
||||
|
||||
.align 2
|
||||
sci_mars_adapter:
|
||||
.long 0x20004000
|
||||
|
||||
slav_pwm_irq:
|
||||
mov.l r1,@-r15
|
||||
|
||||
mov.l spi_mars_adapter,r1
|
||||
mov.w r0,@(0x1C,r1) /* clear PWM IRQ */
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
|
||||
! handle PWM IRQ
|
||||
|
||||
mov.l @r15+,r1
|
||||
mov.l @r15+,r0
|
||||
rte
|
||||
nop
|
||||
|
||||
.align 2
|
||||
spi_mars_adapter:
|
||||
.long 0x20004000
|
||||
|
||||
slav_vres_irq:
|
||||
mov.l svri_mars_adapter,r1
|
||||
mov.w r0,@(0x14,r1) /* clear VRES IRQ */
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
|
||||
mov #0x0F,r0
|
||||
shll2 r0
|
||||
shll2 r0
|
||||
ldc r0,sr /* disallow ints */
|
||||
|
||||
mov.l svri_slave_stk,r15
|
||||
mov.l svri_slave_vres,r0
|
||||
jmp @r0
|
||||
nop
|
||||
|
||||
.align 2
|
||||
svri_mars_adapter:
|
||||
.long 0x20004000
|
||||
svri_slave_stk:
|
||||
.long 0x06040000 /* Cold Start SP */
|
||||
svri_slave_vres:
|
||||
.long slav_reset
|
||||
|
||||
|
||||
! Fast memcpy function - copies longs, runs from sdram for speed
|
||||
! On entry: r4 = dst, r5 = src, r6 = len (in longs)
|
||||
|
||||
.align 4
|
||||
.global _fast_memcpy
|
||||
_fast_memcpy:
|
||||
mov.l @r5+,r3
|
||||
mov.l r3,@r4
|
||||
dt r6
|
||||
bf/s _fast_memcpy
|
||||
add #4,r4
|
||||
rts
|
||||
nop
|
||||
|
||||
! Cache clear line function
|
||||
! On entry: r4 = ptr - should be 16 byte aligned
|
||||
|
||||
.align 4
|
||||
.global _CacheClearLine
|
||||
_CacheClearLine:
|
||||
mov.l _cache_flush,r0
|
||||
or r0,r4
|
||||
mov #0,r0
|
||||
mov.l r0,@r4
|
||||
rts
|
||||
nop
|
||||
|
||||
.align 2
|
||||
|
||||
_cache_flush:
|
||||
.long 0x40000000
|
||||
|
||||
! Cache control function
|
||||
! On entry: r4 = cache mode => 0x10 = CP, 0x08 = TW, 0x01 = CE
|
||||
|
||||
.align 4
|
||||
.global _CacheControl
|
||||
_CacheControl:
|
||||
mov.l _sh2_cctl,r0
|
||||
mov.b r4,@r0
|
||||
rts
|
||||
nop
|
||||
|
||||
.align 2
|
||||
|
||||
_sh2_cctl:
|
||||
.long 0xFFFFFE92
|
||||
|
||||
! void ScreenStretch(int src, int width, int height, int interp);
|
||||
! On entry: r4 = src pointer, r5 = width, r6 = height, r7 = interpolate
|
||||
|
||||
.align 4
|
||||
.global _ScreenStretch
|
||||
_ScreenStretch:
|
||||
cmp/pl r7
|
||||
bt ss_interp
|
||||
|
||||
! stretch screen without interpolation
|
||||
|
||||
0:
|
||||
mov r5,r3
|
||||
shll r3
|
||||
mov r3,r2
|
||||
shll r2
|
||||
add r4,r3
|
||||
add r4,r2
|
||||
1:
|
||||
add #-2,r3
|
||||
mov.w @r3,r0
|
||||
extu.w r0,r1
|
||||
shll16 r0
|
||||
or r1,r0
|
||||
mov.l r0,@-r2
|
||||
cmp/eq r3,r4
|
||||
bf 1b
|
||||
|
||||
/* next line */
|
||||
mov.w ss_pitch,r0
|
||||
dt r6
|
||||
bf/s 0b
|
||||
add r0,r4
|
||||
rts
|
||||
nop
|
||||
|
||||
ss_interp:
|
||||
|
||||
! stretch screen with interpolation
|
||||
|
||||
0:
|
||||
mov r5,r3
|
||||
shll r3
|
||||
mov r3,r2
|
||||
shll r2
|
||||
add r4,r3
|
||||
add r4,r2
|
||||
mov #0,r7
|
||||
1:
|
||||
add #-2,r3
|
||||
mov.w @r3,r0
|
||||
mov.w ss_mask,r1
|
||||
and r0,r1 /* masked curr pixel */
|
||||
shll16 r0
|
||||
add r1,r7 /* add to masked prev pixel */
|
||||
shlr r7 /* blended pixel */
|
||||
or r7,r0 /* curr pixel << 16 | blended pixel */
|
||||
mov r1,r7 /* masked prev pixel = masked curr pixel */
|
||||
mov.l r0,@-r2
|
||||
cmp/eq r3,r4
|
||||
bf 1b
|
||||
|
||||
/* next line */
|
||||
mov.w ss_pitch,r0
|
||||
dt r6
|
||||
bf/s 0b
|
||||
add r0,r4
|
||||
rts
|
||||
nop
|
||||
|
||||
ss_mask:
|
||||
.word 0x7BDE
|
||||
ss_pitch:
|
||||
.word 640
|
||||
|
||||
.align 2
|
||||
|
||||
.text
|
||||
|
||||
main_reset:
|
||||
! do any master SH2 specific reset code here
|
||||
|
||||
mov.l slav_st,r0
|
||||
mov.l slav_ok,r1
|
||||
0:
|
||||
mov.l @r0,r2
|
||||
nop
|
||||
nop
|
||||
cmp/eq r1,r2
|
||||
bf 0b /* wait for slave */
|
||||
|
||||
! recopy rom data to sdram
|
||||
|
||||
mov.l rom_header,r1
|
||||
mov.l @r1,r2 /* src relative to start of rom */
|
||||
mov.l @(4,r1),r3 /* dst relative to start of sdram */
|
||||
mov.l @(8,r1),r4 /* size (longword aligned) */
|
||||
mov.l rom_start,r1
|
||||
add r1,r2
|
||||
mov.l sdram_start,r1
|
||||
add r1,r3
|
||||
shlr2 r4 /* number of longs */
|
||||
add #-1,r4
|
||||
1:
|
||||
mov.l @r2+,r0
|
||||
mov.l r0,@r3
|
||||
add #4,r3
|
||||
dt r4
|
||||
bf 1b
|
||||
|
||||
mov.l main_st,r0
|
||||
mov.l main_ok,r1
|
||||
mov.l r1,@r0 /* tell everyone reset complete */
|
||||
|
||||
mov.l main_go,r0
|
||||
jmp @r0
|
||||
nop
|
||||
|
||||
slav_reset:
|
||||
! do any slave SH2 specific reset code here
|
||||
|
||||
mov.l slav_st,r0
|
||||
mov.l slav_ok,r1
|
||||
mov.l r1,@r0 /* tell master to start reset */
|
||||
|
||||
mov.l main_st,r0
|
||||
mov.l main_ok,r1
|
||||
0:
|
||||
mov.l @r0,r2
|
||||
nop
|
||||
nop
|
||||
cmp/eq r1,r2
|
||||
bf 0b /* wait for master to do the work */
|
||||
|
||||
mov.l slav_go,r0
|
||||
jmp @r0
|
||||
nop
|
||||
|
||||
.align 2
|
||||
main_st:
|
||||
.long 0x20004020
|
||||
main_ok:
|
||||
.ascii "M_OK"
|
||||
main_go:
|
||||
.long mstart
|
||||
rom_header:
|
||||
.long 0x220003D4
|
||||
rom_start:
|
||||
.long 0x22000000
|
||||
sdram_start:
|
||||
.long 0x26000000
|
||||
|
||||
slav_st:
|
||||
.long 0x20004024
|
||||
slav_ok:
|
||||
.ascii "S_OK"
|
||||
slav_go:
|
||||
.long sstart
|
||||
|
||||
|
||||
.global _start
|
||||
_start:
|
||||
|
||||
Reference in New Issue
Block a user